Handy Makefile

The following is a snippet for a handy and concise Makefile that will make executables for all C files in a directory.  It’s good for “sandboxing” this illustrates some of Make’s useful features without before consulting a larger resource.  Tip of the hat to Erik for helping me polish it up.

# Flags for gcc

# All C files as sources, and chop off the .c for targets
SOURCES = $(wildcard *.c)

TARGETS = $(patsubst %.c, %, $(SOURCES))

all: $(TARGETS)

# All targets without an extension depend on their .c files
%: %.c
	@echo "Building $@"
	@gcc $(FLAGS) $< -o $@

# The "@" symbol suppresses Make actually displaying the command. 

	@echo "Removing hidden files"
	@rm -rf .*.swp *.dSYM ._* 2> /dev/null
	@echo "Removing executables"
	@rm -rf $(TARGETS)        2> /dev/null

The nice thing about Make is that it’s useful not only for things like C code. I’ve even used it (quite some time ago) to piece together tracks of music using ecasound.

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